Cover Image for Would you like to access 96 TB (yes, Terabytes!) of RAM? Discover this CXL expansion box that presents the future of memory.
Tue Oct 22 2024

Would you like to access 96 TB (yes, Terabytes!) of RAM? Discover this CXL expansion box that presents the future of memory.

"244 DIMM slots for a single server? That really has great potential."

At the OCP Summit 2024, Inventec, in collaboration with Astera Labs, unveiled an innovative product that enhances server capacity: the CXL expansion box with 96 DIMM slots. This device facilitates the connection of up to 96 DDR5 memory modules to a single server, offering memory capacities that can reach tens of terabytes.

According to reports, this expansion box is compatible with the upcoming Intel Xeon 6 Granite Rapids-SP eight-socket server, thereby multiplying processing capacity. Alongside the Intel Xeon 6 server, which features 128 DDR DIMM slots, users will be able to utilize a total of 244 DIMM slots within a single system, representing a significant leap in memory capacity.

The announcement implies substantial improvements in server memory capacity. The DDR5 DIMMs in question operate at a frequency of DDR5-4800, and the expansion box utilizes Astera Labs' Leo technology. Furthermore, it enables the connection of 24 CDFP ports, each providing a PCIe Gen5 x16 connection that interlinks the CXL box with the servers.

It is noteworthy that this expansion enables up to 20TB of memory in a single server, which has significant implications for future server capabilities and represents a remarkable advancement in this technology. This development is part of the growing potential of Compute Express Link (CXL) technology.

In a related context, Meta collaborated with AMD in 2023 to demonstrate a new type of memory that can be added to servers, capable of managing petabytes of RAM. This joint effort showed that CXL technology could significantly enhance memory efficiency, which in turn would reduce costs and optimize performance.

Astera Labs' involvement marks its second major innovation of the year, following the introduction of its Aries 6 PCIe retimer board in April 2024, designed to optimize data signal integrity through the PCIe interface. This advancement is crucial for high-speed data transfers, which often face degradation over long distances or due to interference. The Aries 6 retimer line is focused on enhancing networking capabilities for future generations of GPUs, accelerators, CPUs, and CXL memory controllers.